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vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 1 of 15 preliminary product description the v048k160t015 v? chip voltage transformation module (vtm) excels at speed, density and efficiency to meet the demands of advanced power applications while providing isolation from input to output. it achieves a response time of less than 1 ? and delivers up to 15.0 a in a volume of less than 0.25 in 3 with unprecedented efficiency. it may be paralleled to deliver higher power levels at an output voltage settable from 8.67 to 18.3 vdc. the vtm v048k160t015s nominal output voltage is 16 vdc from a 48 vdc input factorized bus, vf, and is controllable from 8.67 to 18.3 vdc at no load, and from 8.15 to 17.9 vdc at full load, over a vf input range of 26 to 55 vdc. it can be operated either open- or closed- loop depending on the output regulation needs of the application. operating open-loop, the output voltage tracks its vf input voltage with a transformation ratio, k = 1/3 , for applications requiring an isolated output voltage with high efficiency. closing the loop back to an input pre-regulation module (prm) or dc-dc converter enables tight load regulation. the 16 v vtm achieves a power density of 974 w/in 3 in a v? chip package compatible with standard pick-and- place and surface mount assembly processes. the v? chip bga package supports in-board mounting with a low profile of 0.16" (4 mm) over the board. a j-lead package option supports on-board surface mounting with a profile of only 0.25" (6 mm) over the board. the vtms fast dynamic response and low noise eliminate the need for bulk capacitance at the load, substantially increasing system density while improving reliability and decreasing cost. parameter values unit notes +in to -in -1.0 to 60.0 vdc +in to -in 100 vdc for 100 ms pc to -in -0.3 to 7.0 vdc vc to -in -0.3 to 19.0 vdc +out to -out -0.1 to 25.0 vdc isolation voltage 2,250 vdc input to output output current 15.0 a continuous peak output current 22.5 a for 1 ms output power 269 w continuous peak output power 403 w for 1 ms case temperature 208 ? during reflow operating junction temperature (1) -40 to 125 ? t - grade -55 to 125 ? m - grade storage temperature -40 to 150 ? t - grade -65 to 150 ? m - grade v? chip tm ?vtm v oltage transformation module ? 8v to 16 v v? chip converter 15.0 a (22.5 a for 1 ms) ? igh density ?974 w/in 3 ? mall footprint ?220 w/in 2 low weight ?0.5 oz (14 g) pick & place / smd 125? operation ? ? transient response 3.5 million hours mtbf ? ypical efficiency 96% no output filtering required surface mount bga or j-lead packages v048k160t015 actual size vtm note: (1) the referenced junction is defined as the semiconductor having the highest temperature. this temperature is monitored by a shutdown comparator. k indicates bga configuration. for other mounting options see part numbering below. output current designator (=i out ) v 048 k 160 t 015 v oltage t ransformation module input voltage designator product grade temperatures (?) grade storage operating t -40 to150 -40 to125 m -65 to150 -55 to125 configuration options f= on-board (figure 15) k= in-board (figure 14) output voltage designator (=v out x10) part numbering vf = 26 - 55 v v out = 8.67 - 18.3 v i out = 15.0 a k = 1/3 r out = 35.0 m ? max absolute maximum ratings
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 2 of 15 v? chip voltage transformation module preliminary electrical specifications parameter min typ max unit note input voltage range 26 48 55 vdc operable down to zero v with vc voltage applied input dv/dt 1 v/? input overvoltage turn-on 55.0 vdc input overvoltage turn-off 59.5 vdc input current 5.4 adc input reflected ripple current 138 ma p-p using test circuit in figure 16; see figure 1 no load power dissipation 3.1 4.3 w internal input capacitance 4.0 ? internal input inductance 20 nh input specs (conditions are at 48 vin, full load, and 25? ambient unless otherwise specified) parameter min typ max unit note output voltage 8.67 18.3 vdc no load 8.15 17.9 vdc full load rated dc current 0 15.0 adc 26 - 55 v in peak repetitive current 22.5 a max pulse width 1ms, max duty cycle 10%, baseline power 50% short circuit protection set point 15.3 18.2 21.8 adc module will shut down current share accuracy 5 10 % see parallel operation on page 10 efficiency half load 95.5 96.0 % see figure 3 full load 95.0 95.7 % see figure 3 internal output inductance 1.6 nh internal output capacitance 25.4 ? effective value output overvoltage setpoint 18.3 vdc module will shut down output ripple voltage no external bypass 153 220 mv see figures 2 and 5 10 ? bypass capacitor 13.4 mv see figure 6 effective switching frequency 3.3 3.6 3.7 mhz fixed, 1.8 mhz per phase line regulation k 0.3300 1/3 0.3367 v out = k? in at no load load regulation r out 29.7 35.0 m ? see figure 19 t ransient response v oltage overshoot 245 mv 15.0 a load step with 100 ? c in ; see figures 7 and 8 response time 200 ns see figures 7 and 8 recovery time 1 s see figures 7 and 8 output specs (conditions are at 48 vin, full load, and 25? ambient unless otherwise specified)
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 3 of 15 preliminary figure 1 ?input reflected ripple current at full load and 48 vf. efficiency vs. output current 80 82 84 86 88 90 92 94 96 98 0 1.5 3 4.5 6 7.5 9 10.5 12 13.5 15 output current (a) efficiency (%) figure 3 ?efficiency vs. output current at 48 vf. power dissipation 2 3 4 5 6 7 8 9 10 11 12 0 1.5 3 4.5 6 7.5 9 10.5 12 13.5 15 output current (a) power dissipation (w) figure 4 ?ower dissipation as a function of output current at 48 vf. w aveforms figure 6 ?utput voltage ripple at full load and 16 vout with 10 ? ceramic external bypass capacitance and 20 nh distribution inductance. figure 5 ?output voltage ripple at full load and 16 vout; without any external bypass capacitor. ripple vs. output current 40 60 80 100 120 140 160 0 1.5 3 4.5 6 7.5 9 10.5 12 13.5 15 output current (a) output ripple (mvpk-pk) figure 2 ?output voltage ripple vs. output current at 16 vout with no pol bypass capacitance. electrical specifications (continued)
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 4 of 15 v? chip voltage transformation module preliminary parameter min typ max unit note primary control (pc) dc voltage 4.8 5.0 5.2 vdc module disable voltage 2.4 2.5 vdc module enable voltage 2.5 2.6 vdc vc voltage must be applied when module is enabled using pc current limit 2.4 2.5 2.9 ma source only disable delay time 10 ? pc low to vout low vtm control (vc) external boost voltage 12.0 14.0 19.0 vdc required for vtm start up without prm external boost duration 10 ms vin > 26 vdc. vc must be applied continuously if vin < 26 vdc. auxiliary pins (conditions are at 48 vin, full load, and 25? ambient unless otherwise specified) parameter min typ max unit note mtbf mil-hdbk-217f 3.5 mhrs 25?, gb isolation specifications v oltage 2,250 vdc input to output capacitance 3,000 pf input to output resistance 10 m ? input to output agency approvals (pending) ct?vus ul/csa 60950, en 60950 ce mark low voltage directive mechanical parameters see mechanical drawing, figures 10 and 12 w eight 0.5 / 14.0 oz / g dimensions length 1.26 / 32 in / mm w idth 0.85 / 21.5 in / mm height 0.23 / 5.9 in / mm general figure 7 ?0-15.0 a step load change with 47 ? input capacitance and no output capacitance. figure 8 ?15.0-0 a step load change with 47 ? input capacitance and no output capacitance. electrical specifications (continued)
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 5 of 15 preliminary v? chip stress driven product qualification process symbol parameter min typ max unit note over temperature shutdown 125 130 135 ? junction temperature thermal capacity 0.61 ws/? r jc junction-to-case thermal impedance 1.1 ?/w r jb junction-to-bga thermal impedance 2.1 ?/w r ja junction-to-ambient (1) 6.5 ?/w r ja junction-to-ambient (2) 5.0 ?/w thermal notes: (1) v048k160t015 surface mounted in-board to a 2" x 2" fr4 board, 4 layers 2 oz cu, 300 lfm. (2) v048k160t015 with a 0.25"h heatsink surface mounted on fr4 board, 300 lfm. t est standard environment high temperature operational life (htol) jesd22-a-108-b 125?, vmax, 1,008 hrs t emperature cycling jesd22-a-104b -55? to 125?, 1,000 cycles high temperature storage jesd22-a-103a 150?, 1,000 hrs moisture resistance jesd22-a113-b moisture sensitivity level 5 t emperature humidity bias testing (thb) eia/jesd22-a-101-b 85?, 85% rh, vmax, 1,008 hrs pressure cooker testing (autoclave) jesd22-a-102-c 121?, 100% rh, 15 psig, 96 hrs highly accelerated stress testing (hast) jesd22-a-110b 130?, 85% rh, vmax, 96 hrs solvent resistance/marking permanency jesd22-b-107-a solvents a, b & c as defined mechanical vibration jesd22-b-103-a 20g peak, 20-2,000 hz, test in x, y & z directions mechanical shock jesd22-b-104-a 1,500g peak 0.5 ms pulse duration, 5 pulses in 6 directions electro static discharge testing ?human body model eia/jesd22-a114-a meets or exceeds 2,000 volts electro static discharge testing ?machine model eia/jesd22-a115-a meets or exceeds 200 volts highly accelerated life testing (halt) per vicor internal operation limits verified, destruct margin determined t est specification (1) dynamic cycling per vicor internal constant line, 0-100% load, -20? to 125? test specification (1) note: (1) for details of the test protocols see vicors website. t est standard environment bga solder fatigue evaluation ipc-9701 cycle condition: tc3 (-40 to +125?) ipc-sm-785 test duration: ntc-b (500 failure free cycles) solder ball shear test ipc-9701 failure through bulk solder or copper pad lift-off v? chip ball grid array interconnect qualification electrical specifications (continued)
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 6 of 15 v? chip voltage transformation module preliminary pin/control functions +in/-in dc voltage ports the vtm input should not exceed the maximum specified. be aware of this limit in applications where the vtm is being driven above its nominal output voltage. if less than 26 vdc is present at the +in and -in ports, a continuous vc voltage must be applied for the vtm to process power. otherwise vc voltage need only be applied for 10 ms after the voltage at the +in and -in ports has reached or exceeded 26 vdc. if the input voltage exceeds the overvoltage turn-off, the vtm will shutdown. the vtm does not have internal input reverse polarity protection. adding a properly sized diode in series with the positive input or a fused reverse-shunt diode will provide reverse polarity protection. tm ?for factory use only vc ?vtm control the vc port is multiplexed. it receives the initial v cc voltage from an upstream prm, synchronizing the output rise of the vtm with the output rise of the prm. additionally, the vc port provides feedback to the prm to compensate for the vtm output resistance. in typical applications using vtms powered from prms, the prms vc port should be connected to the vtm vc port. in applications where a vtm is being used without a prm, 14 v must be supplied to the vc port for as long as the input voltage is below 26 v and for 10 ms after the input voltage has reached or exceeded 26 v. the vtm is not designed for extended operation below 26 v. the vc port should only be used to provide v cc voltage to the vtm during startup. pc ?primary control the primary control (pc) port is a multifunction port for controlling the vtm as follows: disable ?if pc is left floating, the vtm output is enabled. to disable the output, the pc port must be pulled lower than 2.4 v, r eferenced to -in. optocouplers, open collector transistors or relays can be used to control the pc port. once disabled, 14 v must be r e-applied to the vc port to restart the vtm. primary auxiliary supply ?the pc port can source up to 2.4 ma at 5 vdc. +out/-out dc voltage output ports the output and output return are through two sets of contact locations. the respective +out and ?ut groups must be connected in parallel with as low an interconnect resistance as possible. within the specified input voltage range, the level 1 dc behavioral model shown in figure 19 defines the output voltage of the vtm. the current source capability of the vtm is shown in the specification table. to take full advantage of the vtm, the user should note the low output impedance of the device. the low output impedance provides fast transient response without the need for bulk pol capacitance. limited- life electrolytic capacitors required with conventional converters can be r educed or even eliminated, saving cost and valuable board real estate. -in pc vc tm +in -out +out -out +out bottom view a b c d e f g h j k l m n p r t u v w y aa ab ac ad ae af ag ah aj ak al 4 3 2 1 a b c d e f g h j k l m n p r t u v w y aa ab ac ad ae af ag ah aj ak al figure 9 ?tm bga configuration signal name bga designation +in a1-l1, a2-l2 ?n aa1-al1, aa2-al2 tm p1, p2 vc t1, t2 pc v1, v2 +out a3-g3, a4-g4, u3-ac3, u4-ac4 ?ut j3-r3, j4-r4, ae3-al3, ae4-al4
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 7 of 15 preliminary notes: 1- dimensions are . 2- unless otherwise specified, tolerances are: .x/[.xx] = +/-0.25/[.01]; .xx/[.xxx] = +/-0.13/[.005] 3- product marking on top surface inch mm 30,00 1.181 1,00 0.039 15,00 0.591 18,00 0.709 1,00 0.039 9,00 0.354 1,00 0.039 1,00 0.039 input output l l c c bottom view solder ball #a1 seating plane top view (component side) output input solder ball #a1 indicator typ 3,9 0.15 15,6 0.62 21,5 0.85 32,0 1.26 1,6 0.06 28,8 1.13 5,9 0.23 16,0 0.63 (106) x ? 0.51 0.020 solder ball mechanical drawings figure 10 ? tm bga mechanical outline; inboard mounting notes: 1- dimensions are . 2- unless otherwise specified, tolerances are: .x/[.xx] = +/-0.25/[.01]; .xx/[.xxx] = +/-0.13/[.005] inch mm 15,00 0.591 17,00 0.669 20,00 0.787 13,00 0.512 16,00 0.630 24,00 0.945 8,00 0.315 16,16 0.636 8,08 0.318 18,00 0.709 1,00 0.039 9,00 0.354 0,37 0.015 29,26 1.152 (2) x 0.394 (4) x 0.236 1,00 0.039 pcb cutout +in +out1 -out1 +out2 -out2 -in vc tm pc solder pad #a1 recommended land and via pattern (component side shown) solder mask defined pad 1,6 0.06 0,51 0.020 1,00 0.039 1,50 0.059 0,50 0.020 1,00 0.039 0,50 0.020 1,00 0.039 solder mask defined pads connect to inner layers 0,51 0.020 0,53 0.021 10,00 6,00 (106) x ? (4) x r ( ? ) ( ) ? plated via ( ) 31 1 figure 11 ?vtm bga pcb land/via layout information; inboard mounting in-board mounting bga surface mounting requires a cutout in the pcb in which to recess the v? chip
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 8 of 15 v? chip voltage transformation module preliminary notes: 1- dimensions are mm/[inch]. 2- unless otherwise specified, tolerances are: .x/[.xx] = +/-0.25/[.01]; .xx/[.xxx] = +/-0.13/[.005] 3- product marking on top surface c c l l 16,00 0.630 24,00 0.945 0,45 0.018 8,00 0.315 14,94 0.588 16,94 0.667 20,00 0.787 12,94 0.509 15,99 0.630 3,01 0.118 3,01 0.118 7,10 0.280 (4) pl. 11,10 0.437 (2) pl. 6,1 0.24 32,0 22,0 0.87 bottom view output input output input top view (component side) 1.26 15,55 0.612 mechanical drawings (continued) figure 12 ? tm j-lead mechanical outline; onboard mounting notes: 1- dimensions are mm/[inch]. 2- unless otherwise specified, tolerances are: .x/[.xx] = +/-0.25/[.01]; .xx/[.xxx] = +/-0.13/[.005] 14,94 0.588 16,94 0.667 20,00 0.787 12,94 0.509 16,00 0.630 24,00 0.945 8,00 0.315 15,74 0.620 3,26 0.128 3,26 0.128 0,51 0.020 1,38 0.054 11,48 0.452 1,60 0.063 7,48 0.295 (component side shown) recommended land pattern -in pc vc tm +in +out1 -out1 +out2 -out2 (4) x (6) x (2) x (2) x (2) x (2) x typ typ (8) x (2) x (2) x (2) x figure 13 ?vtm j-lead pcb land layout information; onboard mounting
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 9 of 15 preliminary inboard mount (vi chip recessed into pcb) 21.5 0.85 32.0 1.26 4.0 0.16 configuration options configuration inboard (1) onboard (1) inboard with 0.25" onboard with 0.25" (figure 14) (figure 15) heatsink heatsink effective power density 1400 w/in 3 880 w/in 3 550 w/in 3 440 w/in 3 junction-board 2.1 ?/w 2.4 ?/w 2.1 ?/w 2.4 ?/w thermal resistance junction-case 1.1 ?/w 1.1 ?/w n/a n/a thermal resistance junction-ambient 6.5 ?/w 6.8 ?/w 5.0 ?/w 5.0 ?/w thermal resistance 300lfm notes: (1) surface mounted to a 2" x 2" fr4 board, 4 layers 2 oz cu figure 14 ?nboard mounting ?package k onboard mount 22.0 0.87 32.0 1.26 6.3 0.25 figure 15 ?nboard mounting ?package f mm in mm in
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 10 of 15 v? chip voltage transformation module preliminary figure 16 ?tm test circuit application note parallel operation in applications requiring higher current or redundancy, vtms can be operated in parallel without adding control circuitry or signal lines. to maximize current sharing accuracy, it is imperative that the source and load impedance on each vtm in a parallel array be equal. if vtms are being fed by an upstream prm, the vc nodes of all vtms must be connected to the prm vc. to achieve matched impedances, dedicated power planes within the pc board should be used for the output and output return paths to the array of paralleled vtms. this technique is preferable to using traces of varying size and length. the vtm power train and control architecture allow bi-directional power transfer when the vtm is operating within its specified ranges. bi-directional power processing improves transient response in the event of an output load dump. the vtm may operate in reverse, r eturning output power back to the input source. it does so efficiently. thermal management the high efficiency of the vtm results in low power dissipation minimizing temperature rise, even at full output current. the heat generated within the internal semiconductor junctions is coupled through very low thermal resistances, r jc and r jb (see figure 17), to the pc board allowing flexible thermal management. case 1 convection via optional heat sink to air. in an environment with forced convection over the surface of a pcb with 0.4" of headroom, a vtm with a 0.25" heat sink offers a simple thermal management option. the total junction to ambient thermal r esistance of a surface mounted v048k160t015 with a heat sink attached is 4.8 ?/w in 300 lfm airflow, (see figure 18). at 16 vout and full rated current (15.0a), the vtm dissipates approximately 11 w per figure 4. this results in a temperature rise of approximately 53 ?, allowing operation in an air temperature of 72 ? without exceeding the 125 ? max junction temperature. case 2 conduction via the pc board to air the low junction to bga thermal resistance allows the use of the pc board as a means of removing heat from the vtm. convection from the pc board to ambient, or conduction to a cold plate, enable flexible thermal management options. w ith a vtm mounted on a 2.0 in 2 area of a multi-layer pc board with appropriate power planes resulting in 8 oz of effective copper weight, the junction-to-bga thermal resistance, r ja , is 6.5 ?/w in 300 lfm of air. with a maximum junction temperature of 125 ? and 11 w of dissipation at full current of 15.0 a, the resulting temperature rise of 72 ? allows the vtm to operate at full rated current up to a 53 ? ambient temperature. see thermal resistances on page 9 for additional details on this thermal management option. adding low-profile heat sinks to the pc board can lower the thermal r esistance of the pc board surrounding the vtm. additional cooling may be added by coupling a cold plate to the pc board with low thermal resistance stand offs. case 3 combined direct convection to the air and conduction to the pc board. a combination of cooling techniques that utilize the power planes and dissipation to the air will also reduce the total thermal impedance. this is the most effective cooling method. to estimate the total effect of the combination, treat each cooling branch as one leg of a parallel resistor network. f1 load + ? input reflected ripple measurement point c2 0.47 f ceramic + ? 14 v -in pc vc tm +in -out +out vtm +out -out k ro notes: c3 should be placed close to the load r3 may be esr of c3 or a seperate damping resistor. c3 10 ? r3 10 m ? c1 47 ? al electrolytic 7a fuse configuration options (continued)
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 11 of 15 preliminary l in = 20 nh + ? + ? v out c out v in v i k + ? + ? c in i out r c out i q r out r c in i q + ? + v out v in v i k + ? + ? i out r out ? 65 ma figure 18 ?unction-to-ambient thermal resistance of vtm with 0.25" heat sink. vtm with 0.25'' heat sink 3 4 5 6 7 8 9 10 0 100 200 300 400 500 600 airflow (lfm) tja application note (continued) figure 17 thermal resistance v? chip vtm level 1 dc behavioral model for 48 v to 16 v, 15.0 a figure 19 ?his model characterizes the dc operation of the v? chip vtm, including the converter transfer function and its losses. the m odel enables estimates or simulations of output voltage as a function of input voltage and output load, as well as total converter power dissipation o r heat generation. v? chip vtm level 2 transient behavioral model for 48 v to 16 v, 15.0 a figure 20 ?his model characterizes the ac operation of the v? chip vtm including response to output load or input voltage transients or steady state modulations. the model enables estimates or simulations of input and output voltages under transient conditions, including resp onse to a stepped load with or without external filtering elements. 29.7 m ? 1/3 ?vin 1/3 ?iout 65 ma 1/3 ?iout 1/3 ?vin 29.7 m ? l i n = 20 nh r c in 1.3 m ? 1.8 nh 6.9 m ? r c out 0.21 m ? 25.4 ? l out = 1.6 nh 4.0 ?
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 12 of 15 v? chip voltage transformation module preliminary figure 21 ? the prm controls the factorized bus voltage, v f , in proportion to output current to compensate for the output resistance, ro, of the vtm. the vtm output voltage is typically within 1% of the desired load voltage (v l ) over all line and load conditions. -in pc vc tm +in -out +out vtm +out -out k ro +out ?out +in ?in vc pc tm il vh pr nc sg sc prm-al os nc cd l o a d fac torized bus (v f ) vo = v l 1.0% ( ioro ) k v f = v l + k vin r os r cd fpa adaptive loop figure 22 ?an external error amplifier or point-of-load ic (polic) senses the load voltage and controls the prm output ?the factorized bus ?as a function of output current, compensating for the output resistance of the vtm and for distribution resistance. +out ?out +in ?in vc pc tm il vh pr nc sg sc prm-al os nc cd -in pc vc tm +in -out +out vtm +out -out k ro remote loop control v f = f (vs) l o a d fac torized pow er bus vo = v l 0.4% +s ?s vin fpa non-isolated remote loop in figures 21 ?23; k = vtm transformation ratio v f = prm output (factorized bus voltage) r o = vtm output resistance v o = vtm output v l = desired load voltage fpa isolated remote loop vc pc tm il vs pr nc fg fb prm-if nc nc nc +out ?out +in ?in -in pc vc tm +in -out +out vtm +out -out k ro v f = f (vs) fac torized pow er bus remote loop control l o a d vo = v l 0.4% +s ?s vin figure 23 ?n external error amplifier or point-of-load ic (polic) senses the load voltage and controls the prm output ?the factorized b us ?as a function of output current, compensating for the output resistance of the vtm and for distribution resistance. the factorized bus voltage ( v f ) increases in proportion to load current. the remote feedback loop is isolated within the prm to support galvanic isolation and hipot compliance at the system l evel. application note (continued)
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 13 of 15 preliminary application note (continued) v? chip soldering recommendations v? chip modules are intended for reflow soldering processes. the following information defines the processing conditions required for successful attachment of a v? chip to a pcb. failure to follow the r ecommendations provided can result in aesthetic or functional failure of the module. storage v? chip modules are currently rated at msl 5. exposure to ambient conditions for more than 72 hours requires a 24 hour bake at 125? to re move moisture from the package. solder paste stencil design solder paste is recommended for a number of reasons, including overcoming minor solder sphere co-planarity issues as well as simpler integration into overall smd process. 63/37 snpb, either no-clean or water-washable, solder paste should be used. pb-free development is underway. the recommended stencil thickness is 6 mils. the apertures should be 20 mils in diameter for the inboard (bga) application and 0.9-0.9:1 for the onboard (j-leaded). pick and place inboard (bga) modules should be placed as accurately as possible to minimize any skewing of the solder joint; a maximum offset of 10 mils is allowable. onboard (j-leaded) modules should be placed within ? mils. to maintain placement position, the modules should not be subjected to acceleration greater than 500 in/sec 2 prior to reflow. reflow there are two temperatures critical to the reflow process; the solder joint temperature and the modules case temperature. the solder joints temperature should reach at least 220?, with a time above liquidus (183?) of ~30 seconds. the modules case temperature must not exceed 208 ? at anytime during reflow. because of the ? t needed between the pin and the case, a forced-air convection oven is preferred for reflow soldering. this reflow method generally transfers heat from the pcb to the solder joint. the modules large mass also reduces its temperature rise. care should be taken to prevent smaller devices from excessive temperatures. reflow of modules onto a pcb using air-vac-type equipment is not recommended due to the high temperature the module will experience. inspection for the bga-version, a visual examination of the post-reflow solder joints should show relatively columnar solder joints with no bridges. an inspection using x-ray equipment can be done, but the modules materials may make imaging difficult. the j-lead versions solder joints should conform to ipc 12.2 ? r operly wetted fillet must be evident. heel fillet height must exceed lead thickness plus solder thickness. removal and rework v? chip modules can be removed from pcbs using special tools such as those made by air-vac. these tools heat a very localized region of the board with a hot gas while applying a tensile force to the component (using vacuum). prior to component heating and removal, the entire board should be heated to 80-100? to decrease the component heating time as well as local pcb warping. if there are adjacent moisture-sensitive components, a 125? bake should be used prior to component removal to prevent popcorning. v? chip modules should not be expected to survive a removal operation. case temperature, 208oc joint temperature, 220oc 239 165 91 16 degc 183 soldering time figure 24 ?hermal profile diagram figure 25 ?properly reflowed v? chip j-lead
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 page 14 of 15 v? chip voltage transformation module preliminary input impedance recommendations to take full advantage of the vtms capabilities, the impedance of the source (input source plus the pc board impedance) must be low over a range from dc to 5 mhz. the input of the vtm (factorized bus) should be locally bypassed with a 8 ? low q aluminum electrolytic capacitor. additional input capacitance may be added to improve transient performance or compensate for high source impedance. the vtm has extremely wide bandwidth so the source response to transients is usually the limiting factor in overall output response of the vtm. anomalies in the response of the source will appear at the output of the vtm, multiplied by its k factor of 1/3 . the dc resistance of the source should be kept as low as possible to minimize voltage deviations on the input to the vtm. if the vtm is going to be operating close to the high limit of its input range, make sure input voltage deviations will not trigger the input overvoltage turn-off threshold. input fuse recommendations v? chips are not internally fused in order to provide flexibility in configuring power systems. however, input line fusing of v? chips must always be incorporated within the power system. a fast acting fuse is r equired to meet safety agency conditions of acceptability. the input line fuse should be placed in series with the +in port. wa rranty v icor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. this warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. vicor shall not be liable for collateral or consequential damage. this warranty is extended to the original purchaser only. except for the foregoing express warranty, vicor makes no warranty, express or implied, including, but not limited to, the w arranty of merchantability or fitness for a particular purpose. vi cor will repair or replace defective products in accordance with its own best judgement. for service under this warranty, the buyer must contact vicor to obtain a return material authorization (rma) number and shipping instructions. products returned without prior authorization will be returned to the buyer. the buyer will pay all charges incurred in returning the product to the factory. vicor will pay all reshipment charges i f the product was defective within the terms of this warranty. information published by vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. vicor r eserves the right to make changes to any products without further notice to improve reliability, function, or design. vicor do es not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may d irectly threaten life or injury. per vicor terms and conditions of sale, the user of vicor components in life support applications assumes all risks of such use and indemnifies v icor against all damages. application note (continued)
vicorpower.com 800-735-6200 v? chip voltage transformation module v048k160t015 rev. 1.0 4/05 vi cors comprehensive line of power solutions includes high density ac-dc and dc-dc modules and accessory components, fully configurable ac-dc and dc-dc power supplies, and complete custom power systems. information furnished by vicor is believed to be accurate and reliable. however, no responsibility is assumed by vicor for its use. vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. all sales are subject to vicors terms and conditions of sale, which are available upon request. specifications are subject to change without notice. intellectual property notice v icor and its subsidiaries own intellectual property (including issued u.s. and foreign patents and pending patent applications) relating to the products described in this data sheet. interested parties should contact vicor's intellectual property department. v icor corporation 25 frontage road andover, ma, usa 01810 t el: 800-735-6200 fax: 978-475-6715 email v icor express: vicorexp@vicr.com t echnical support: apps@vicr.com

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